Материал: 74HC597A

Inputs

Resulting Function

Serial

Parallel

Shift

Serial Shift/

Latch

Shift

Input

Inputs

Latch

Register

Output

Operation

Reset

Parallel Load

Clock

Clock

SA

A±H

Contents

Contents

QH

Reset shift register

L

X

L, H,

X

X

X

U

L

L

Reset shift register; load

L

X

X

X

a±h

a±h

L

L

parallel data into data latch

Load parallel data into data

H

H

L,H,

X

a±h

a±h

U

U

latch

Transfer latch contents to

H

L

L, H,

X

X

X

U

LRN → SRN

LRH

shift register

Contents of data latch and

H

H

L, H,

L,H,

X

X

U

U

U

shift register are

unchanged

Load parallel data into data

H

L

X

X

a±h

a±h

a±h

h

latch and shift register

Shift serial data into shift

H

H

X

D

X

*

SRA = D;

SRG → SRH

register

SRN → SRN + 1

Load parallel data into data

H

H

D

a±h

a±h

SRA = D;

SRG → SRH

latch and shift serial data

SRN → SRN + 1

into shift register

LR = latch register contents

a±h = data at parallel data inputs A±H

U = remains unchanged

SR = shift register contents

D = data (L, H) at serial data input SA

X = don't care

MOTOROLA

6

MC54/74HC597A

SWITCHING WAVEFORMS

tw

1/fmax

tr

tf

tw

90%

VCC

VCC

LATCH CLOCK

50%

50%

SHIFT CLOCK

10%

GND

GND

tPLH

tPHL

tPLH

tPHL

QH

90%

QH

50%

50%

10%

tTLH

tTHL

Figure 1. (Serial Shift/Parallel Load = L)

Figure 2. (Serial Shift/Parallel Load = H)

Figure 3.

Figure 4.

Figure 5.

Figure 6.

TEST POINT

SERIAL SHIFT/

VCC

OUTPUT

50%

PARALLEL LOAD

GND

DEVICE

tsu

UNDER

CL*

SHIFT CLOCK

VCC

TEST

50%

GND

* Includes all probe and jig capacitance

Figure 7.

Figure 8. Test Circuit

7

MOTOROLA

SERIAL DATA

14

INPUT, SA

SHIFT CLOCK

11

RESET

10

SERIAL SHIFT/

13

PARALLEL LOAD

LATCH CLOCK

12

STAGE A

A

15

D

Q

C

S

D

CR Q

STAGE B

B

1

D

Q

C

D S

CR Q

PARALLEL

DATA

C 2

STAGE C*

INPUTS

D 3

STAGE D*

E 4

STAGE E*

F 5

STAGE F*

G 6

STAGE G*

STAGE H

H 7

D

Q

C

D S

9 QH

C

Q

R

MOTOROLA

8

9

MOTOROLA

J SUFFIX

CERAMIC PACKAGE

±A

±

CASE 620±10

NOTES:

ISSUE V

16

9

1.

DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

±B

2.

CONTROLLING DIMENSION: INCH.

1

8

±

3.

DIMENSION L TO CENTER OF LEAD WHEN

FORMED PARALLEL.

C

L

4.

DIM F MAY NARROW TO 0.76 (0.030) WHERE

THE LEAD ENTERS THE CERAMIC BODY.

INCHES

MILLIMETERS

DIM

MIN

MAX

MIN

MAX

±T

A

0.750

0.785

19.05

19.93

B

0.240

0.295

6.10

7.49

SEATING±

N

K

C

Ð

0.200

Ð

5.08

PLANE

D

0.015

0.020

0.39

0.50

E

0.050 BSC

1.27 BSC

E

M

F

0.055

0.065

1.40

1.65

G

0.100 BSC

2.54 BSC

F

G

J 16 PL

J

0.008

0.015

0.21

0.38

K

0.125

0.170

3.18

4.31

0.25 (0.010)

T

B

D 16 PL

M

S

L

0.300 BSC

7.62 BSC

0.25 (0.010)

M

T

A

S

M

0°

15°

0°

15°

N

0.020

0.040

0.51

1.01

MOTOROLA

10