AD620–Typical Characteristics
1000
fA/!Hz |
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– |
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NOISECURRENT |
100 |
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10 |
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1 |
10 |
100 |
1000 |
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FREQUENCY – Hz |
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Figure 9. Current Noise Spectral Density vs. Frequency |
Figure 11. 0.1 Hz to 10 Hz Current Noise, 5 pA/Div |
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100,000 |
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–mV |
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RTI |
10,000 |
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2.0mV/DIV |
CTO 858C, |
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IN-AMP |
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FET INPUT |
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NOISE – |
FROM 258 |
1000 |
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RTI |
DRIFT |
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AD620A |
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100 |
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TOTAL |
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TIME – 1 SEC/DIV |
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10 |
10k |
100k |
1M |
10M |
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1k |
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SOURCE RESISTANCE –V |
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Figure 10a. 0.1 Hz to 10 Hz RTI Voltage Noise (G = 1) |
Figure 12. Total Drift vs. Source Resistance |
0.1mV/DIV |
RTI NOISE – |
TIME – 1 SEC/DIV |
Figure 10b. 0.1 Hz to 10 Hz RTI Voltage Noise (G = 1000)
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+160 |
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+140 |
G = 1000 |
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+120 |
G = 100 |
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+100 |
G = 10 |
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dB |
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G = 1 |
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– |
+80 |
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CMR |
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+60 |
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+40 |
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+20 |
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0 |
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10 |
100 |
1k |
10k |
100k |
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0.1 |
1 |
1M |
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FREQUENCY – Hz |
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Figure 13. CMR vs. Frequency, RTI, Zero to 1 kΩ Source Imbalance
–6– |
REV. E |
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AD620 |
180 |
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35 |
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G = 10, 100, 1000 |
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160 |
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30 |
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p-p |
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140 |
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G = 1000 |
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Volts |
25 |
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120 |
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OUTPUTVOLTAGE – |
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G = 1 |
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20 |
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100 |
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G = 100 |
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80 |
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15 |
BW LIMIT |
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G = 10 |
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10 |
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60 |
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dB–PSR |
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40 |
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G = 1 |
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5 |
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G = 1000 |
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G = 100 |
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20 |
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0 |
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0.1 |
1 |
10 |
100 |
1k |
10k |
100k |
1M |
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1k |
10k |
100k |
1M |
FREQUENCY – Hz |
FREQUENCY – Hz |
Figure 14. Positive PSR vs. Frequency, RTI (G = 1–1000) |
Figure 17. Large Signal Frequency Response |
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180 |
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160 |
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140 |
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120 |
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– dB |
100 |
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PSR |
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G = 1000 |
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80 |
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G = 100 |
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60 |
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G = 10 |
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40 |
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20 |
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G = 1 |
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0.1 |
1 |
10 |
100 |
1k |
10k |
100k |
1M |
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FREQUENCY – Hz |
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Figure 15. Negative PSR vs. Frequency, RTI (G = 1–1000)
1000
100
V/V– 10
GAIN
1
0.1 |
1k |
10k |
100k |
1M |
10M |
100 |
FREQUENCY – Hz
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+VS –0.0 |
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(REFERRED TO SUPPLY VOLTAGES) |
–0.5 |
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INPUT VOLTAGE LIMIT – Volts |
–1.0 |
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–1.5 |
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+1.5 |
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+1.0 |
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+0.5 |
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–V +0.0 |
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S |
5 |
10 |
15 |
20 |
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0 |
SUPPLY VOLTAGE 6 Volts
Figure 18. Input Voltage Range vs. Supply Voltage, G = 1
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+VS –0.0 |
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OUTPUT VOLTAGE SWING – Volts |
(REFERRED TO SUPPLY VOLTAGES) |
–0.5 |
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–1.0 |
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RL = 10kV |
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–1.5 |
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RL = 2kV |
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+1.5 |
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RL = 2kV |
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+1.0 |
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+0.5 |
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RL = 10kV |
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–V |
+0.0 |
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S |
0 |
5 |
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20 |
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SUPPLY VOLTAGE 6 Volts
Figure 16. Gain vs. Frequency |
Figure 19. Output Voltage Swing vs. Supply Voltage, |
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G = 10 |
REV. E |
–7– |
AD620
p-p |
30 |
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Volts |
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G = 10 |
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VS = 615V |
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– |
20 |
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SWING |
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VOLTAGEOUTPUT |
10 |
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0 |
100 |
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1k |
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10k |
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LOAD RESISTANCE –V |
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Figure 20. Output Voltage Swing vs. Load Resistance
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Figure 23. Large Signal Response and Settling Time, G = 10 (0.5 mV = 001%)
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Figure 21. Large Signal Pulse Response and Settling Time G = 1 (0.5 mV = 0.01%)
Figure 24. Small Signal Response, G = 10, RL = 2 kΩ, CL = 100 pF
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Figure 22. Small Signal Response, G = 1, RL = 2 kΩ, CL = 100 pF
Figure 25. Large Signal Response and Settling Time, G = 100 (0.5 mV = 0.01%)
–8– |
REV. E |
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AD620 |
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20 |
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15 |
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TO 0.01% |
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–ms |
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TO 0.1% |
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TIME |
10 |
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SETTLING |
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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5 |
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0 |
5 |
10 |
15 |
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0 |
OUTPUT STEP SIZE – Volts
Figure 26. Small Signal Pulse Response, G = 100, RL = 2 kΩ, CL = 100 pF
Figure 29. Settling Time vs. Step Size (G = 1)
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Figure 27. Large Signal Response and Settling Time, G = 1000 (0.5 mV = 0.01%)
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Figure 28. Small Signal Pulse Response, G = 1000, RL = 2 kΩ, CL = 100 pF
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1000 |
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–m |
100 |
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SETTLING TIME |
10 |
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1 |
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1 |
10 |
100 |
1000 |
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GAIN |
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Figure 30. Settling Time to 0.01% vs. Gain, for a 10 V Step
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Figure 31a. Gain Nonlinearity, G = 1, RL = 10 kΩ |
(10 μV = 1 ppm) |
REV. E |
–9– |
AD620 |
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Figure 31b. Gain Nonlinearity, G = 100, RL = 10 kΩ |
(100 μV = 10 ppm) |
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Figure 31c. Gain Nonlinearity, G = 1000, RL = 10 kΩ |
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(1 mV = 100 ppm) |
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10kV* |
1kV |
10kV |
INPUT |
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10T |
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10V p-p |
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100kV |
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VOUT |
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+VS |
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11kV |
1kV |
100V |
2 |
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1 |
7 |
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G=1000 |
G=1 |
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G=100 |
G=10 |
AD620 |
6 |
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49.9V 499V |
5.49kV |
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5 |
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8 |
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4 |
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3 |
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–V |
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S |
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*ALL RESISTORS 1% TOLERANCE |
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Figure 32. Settling Time Test Circuit
I1 |
20mA |
VB |
20mA |
I2 |
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A1 |
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A2 |
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10kV |
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C1 |
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C2 |
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10kV |
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A3 |
OUTPUT |
R3 |
R1 |
R2 |
10kV |
10kV |
REF |
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400V |
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– IN |
Q1 |
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Q2 |
+IN |
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RG |
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R4 |
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400V |
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GAIN |
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GAIN |
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SENSE |
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SENSE |
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–V |
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S |
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Figure 33. Simplified Schematic of AD620
THEORY OF OPERATION
The AD620 is a monolithic instrumentation amplifier based on a modification of the classic three op amp approach. Absolute value trimming allows the user to program gain accurately (to 0.15% at G = 100) with only one resistor. Monolithic construction and laser wafer trimming allow the tight matching and tracking of circuit components, thus ensuring the high level of performance inherent in this circuit.
The input transistors Q1 and Q2 provide a single differentialpair bipolar input for high precision (Figure 33), yet offer 10¥ lower Input Bias Current thanks to Superbeta processing. Feedback through the Q1-A1-R1 loop and the Q2-A2-R2 loop maintains constant collector current of the input devices Q1, Q2 thereby impressing the input voltage across the external gain setting resistor RG. This creates a differential gain from the inputs to the A1/A2 outputs given by G = (R1 + R2)/RG + 1. The unity-gain subtracter A3 removes any common-mode signal, yielding a single-ended output referred to the REF pin potential.
The value of RG also determines the transconductance of the preamp stage. As RG is reduced for larger gains, the transconductance increases asymptotically to that of the input transistors. This has three important advantages: (a) Open-loop gain is boosted for increasing programmed gain, thus reducing gainrelated errors. (b) The gain-bandwidth product (determined by C1, C2 and the preamp transconductance) increases with programmed gain, thus optimizing frequency response. (c) The input voltage noise is reduced to a value of 9 nV/ÖHz, determined mainly by the collector current and base resistance of the input devices.
The internal gain resistors, R1 and R2, are trimmed to an absolute value of 24.7 kW, allowing the gain to be programmed accurately with a single external resistor.
The gain equation is then
= 49.4 kW +
G 1
RG so that
= 49.4 kW
RG G - 1
–10– |
REV. E |